1. Field of the Invention
The present invention is directed to providing a comparator circuit for use in high frequency applications and, more particularly, to a comparator with a smooth start-up for use in a phase-locked loop or level-locked loop, for example in a time-division multiple access (TDMA) telephony system.
2. Description of the Related Art
A phase-locked loop is commonly used in radio communications at a wide range of frequencies, for both analog and digital signals. In some conventional phase-locked loops for carrier recovery, a comparator is used. It is desirable for phase-locked loops to lock quickly, particularly when the entire transmitter or receiver in a TDMA system is powered up and down many times every second for power savings. Since a comparator is a non-linear high gain circuit, if it is powered up without proper controls, it can throw the loop into states from which it cannot recover, or at least cause a delay in circuit start-up.